Xilinx - PLB PCI Full Bridge

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Contents

V XI LI NX fegiCUw PLB PCI Full Bridge vl OOa DS508 March 21 2006 Product Specification Introduction The PLB PCI Full Bridge design provides full bridge functionality between the Xilinx 64 bit PLB and a 32 bit Revision 2 2 compliant Peripheral Component Interconnect PCI bus The bridge is referred to as the PLB PCI Bridge in this document The Xilinx PLB is a 64 bit bus subset of the IBM PLB described in the 64 Bit Processor Local Bus Architecture Specification i 3 5 Details on the Xilinx PLB and the PLB IPIF are found in the Processor IP Reference Guide This guide is accessed via EDK help or the Xilinx website at http www xilinx com ise embedded proc_ip_ref_ guide pdf The LogiCORE PCI v3 0 core provides an interface with the PCI bus Details of ...